Au–CeO₂ vertically aligned nanocomposite01Emerging devices · Compact modeling
Making memristor programming predictable
Measurement-calibrated compact models and programming strategies that account for nonlinear switching and post-write relaxation.
Electrical Engineering · Purdue University
Devices, circuits & computing.
I study emerging electronic devices and how their physical behavior shapes computing hardware. My work connects thin-film experiments and compact modeling with circuit design and device-aware computation.
Selected work
Au–CeO₂ vertically aligned nanocomposite01Emerging devices · Compact modeling
Measurement-calibrated compact models and programming strategies that account for nonlinear switching and post-write relaxation.
MNIST classification accuracy
Write-verified differential-pair synapses
02Device modeling · Neuromorphic computing
Crossbar simulations that connect measured memristor nonidealities to synaptic updates and neural-network accuracy.
TSMC N40 · Physical implementation03Digital design · Near-memory computing
A signed-int8 attention datapath with reciprocal-based normalization, SRAM integration, and an RTL-to-GDSII implementation.
Background
I am pursuing a B.S. in Electrical Engineering at Purdue, concentrating in Microelectronics and Semiconductors. In Wang’s Thin Film Group, I work on memristive devices and their models. At the NanoX Lab, my work includes CMOS+X integration, automated characterization, and mixed-signal circuits.
More about my background